1. Technical Field
Example embodiments relate to semiconductor devices, and more particularly to a row address control circuit, a semiconductor memory device including the same and a method of controlling row addresses of a semiconductor memory device.
2. Description of the Related Art
In general, DRAM cells, which are used in area requiring high speed data transmission, includes dynamic cells, each having a cell capacitor and a cell transistor which switches the cell capacitor. In the dynamic cells, refresh operation needs to be performed periodically. Recently, semiconductor memory devices have been developed for handling such refresh operation internally.
However, when the semiconductor memory devices handle the refresh operation internally, such semiconductor memory devices may have lower operating speed. In addition, there may be some difficulties for testing precisely refresh timing in such semiconductor memory devices.